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50 ma, high voltage, micropower linear regulator adp1720 rev. 0 information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ?2007 analog devices, inc. all rights reserved. features wide input voltage range: 4 v to 28 v maximum output current: 50 ma low light load current: 28 a at 0 a load 35 a at 100 a load low shutdown current: 0.7 a low dropout voltage: 275 mv @ 50 ma load initial accuracy: 0.5% accuracy over line, load, and temperature: 2% stable with small 1f ceramic output capacitor fixed 3.3 v and 5.0 v output voltage options adjustable output voltage option: 1.225 v to 5.0 v current limit and thermal overload protection logic controlled enable space-saving thermally enhanced msop package applications dc-to-dc post regulation pcmcia regulation keep-alive power in portable equipment industrial applications typical application circuits gnd 1 gnd 2 gnd 3 gnd 4 8 7 6 gnd in out en 5 adp1720 v in = 28v v out = 5v 1f 1f 06111-001 figure 1. adp1720 with fixed output voltage, 5.0 v gnd 1 gnd 2 gnd 3 gnd 4 8 7 6 adj in out en 5 adp1720 adjustable v in = 12v v out = 1.225v(1 + r1/r2) 1f 1f r1 r2 06111-002 figure 2. adp1720 with adjustable output voltage, 1.225 v to 5.0 v general description the adp1720 is a high voltage, micropower, low dropout linear regulator. operating over a very wide input voltage range of 4 v to 28 v, the adp1720 can provide up to 50 ma of output current. with just 28 a of quiescent supply current and a micropower shutdown mode, this device is ideal for applications that require low quiescent current. the adp1720 is available in fixed output voltages of 3.3 v and 5.0 v. an adjustable version is also available, which allows the output to be set anywhere between 1.225 v and 5.0 v. an enable function that allows external circuits to turn on and turn off the adp1720 output is available. for automatic startup, the enable pin can be connected directly to the input rail. the adp1720 is optimized for stable operation with small 1 f ceramic output capacitors, allowing for good transient perform- ance while occupying minimal board space. the adp1720 operates from C40c to +125c and uses current limit protection and thermal overload protection circuits to prevent damage to the device in adverse conditions. available in a small thermally enhanced msop package, the adp1720 provides a compact soluti on with low thermal resistance.
adp1720 rev. 0 | page 2 of 16 table of contents features .............................................................................................. 1 applications....................................................................................... 1 typical application circuits............................................................ 1 general description ......................................................................... 1 revision history ............................................................................... 2 specifications..................................................................................... 3 absolute maximum ratings............................................................ 5 thermal resistance ...................................................................... 5 esd caution.................................................................................. 5 pin configurations and function descriptions ........................... 6 typical performance characteristics ..............................................7 theory of operation ...................................................................... 10 adjustable output voltage (adp1720 adjustable) ............... 10 applications information .............................................................. 11 capacitor selection .................................................................... 11 current limit and thermal overload protection ................. 11 thermal considerations............................................................ 12 printed circuit board layout considerations ....................... 14 outline dimensions ....................................................................... 15 ordering guide .......................................................................... 15 revision history 3/07revision 0: initial version
adp1720 rev. 0 | page 3 of 16 specifications v in = 12 v, i out = 100 a, c in = c out = 1 f, t a = 25c, unless otherwise noted. table 1. parameter symbol conditions min typ max unit input voltage range v in t j = ?40c to +125c 4 28 v operating supply i gnd i out = 0 a 28 a current i out = 0 a, v in = v out + 0.5 v or 4 v (whichever is greater), t j = ?40c to +125c 60 a i out = 100 a 35 a i out = 100 a, v in = v out + 0.5 v or 4 v (whichever is greater), t j = ?40c to +125c 90 a i out = 1 ma 74 a i out = 1 ma, v in = v out + 0.5 v or 4 v (whichever is greater), t j = ?40c to +125c 160 a i out = 10 ma 300 a i out = 10 ma, v in = v out + 0.5 v or 4 v (whichever is greater), t j = ?40c to +125c 415 a 100 a < i out < 50 ma, v in = v out + 0.5 v or 4 v (whichever is greater), t j = ?40c to +125c 1185 2115 a shutdown current i gnd-sd en = gnd 0.7 a en = gnd, t j = ?40c to +125c 1.5 a fixed output v out i out = 100 a ?0.5 +0.5 % voltage accuracy 100 a < i out < 50 ma ?1 +1 % (adp1720 fixed) 100 a < i out < 50 ma, t j = ?40c to +125c ?2 +2 % adjustable output v out i out = 100 a 1.2188 1.2250 1.2311 v voltage accuracy 100 a < i out < 50 ma 1.2127 1.2372 v (adp1720 adjustable) 1 100 a < i out < 50 ma, t j = ?40c to +125c 1.2005 1.2495 v line regulation ?v out /?v in v in = (v out + 0.5 v) to 28 v, t j = ?40c to +125c ?0.02 +0.02 %/v load regulation 2 ?v out /?i out 1 ma < i out < 50 ma 0.001 %/ma 1 ma < i out < 50 ma, t j = ?40c to +125c 0.005 %/ma dropout voltage 3 v dropout i out = 10 ma 55 mv i out = 10 ma, t j = ?40c to +125c 105 mv i out = 50 ma 275 mv i out = 50 ma, t j = ?40c to +125c 480 mv start-up time 4 t start-up 200 s current limit threshold d 5 i limit 55 90 140 ma thermal shutdown threshold ts sd t j rising 150 c thermal shutdown hysteresis ts sd-hys 15 c en input logic high v ih 4 v v in 28 v 1.8 v en input logic low v il 4 v v in 28 v 0.4 v en input leakage current v i-leakage en = gnd 0.1 1 a en = in 0.5 1 a adj input bias current (adp1720 adjustable) adj i-bias 30 100 na
adp1720 rev. 0 | page 4 of 16 parameter symbol conditions min typ max unit output noise out noise v out = 1.6 v, c out = 1 f 146 v rms (10 hz to 100 khz) v out = 1.6 v, c out = 10 f 124 v rms v out = 5 v, c out = 1 f 340 v rms v out = 5 v, c out = 10 f 266 v rms power supply psrr f = 120 hz, v in = 8 v, v out = 1.6 v ?90 db rejection ratio f = 1 khz, v in = 8 v, v out = 1.6 v ?80 db f = 10 khz, v in = 8 v, v out = 1.6 v ?60 db f = 120 hz, v in = 8 v, v out = 5 v ?83 db f = 1 khz, v in = 8 v, v out = 5 v ?70 db f = 10 khz, v in = 8 v, v out = 5 v ?50 db 1 accuracy when out is connected directly to adj. when out voltage is set by external feedback resistors, absolute accuracy in a djust mode depends on the tolerances of resistors used. 2 based on an end-point calculation using 1 ma and 50 ma loads. see figure 6 for typical load regulation performance for loads l ess than 1 ma. 3 dropout voltage is defined as the input-to-output voltage differe ntial when the input voltage is set to the nominal output vol tage. this applies only for output voltages above 4 v. 4 start-up time is defined as the time between the rising edge of en to out being at 95% of its nominal value. 5 current limit threshold is defi ned as the current at which the output voltage dr ops to 90% of the specif ied typical value. for example, the current limit for a 5.0 v output voltage is defined as the curre nt that causes the output voltage to drop to 90% of 5.0 v, or 4.5 v.
adp1720 rev. 0 | page 5 of 16 absolute maximum ratings table 2. parameter rating in to gnd ?0.3 v to +30 v out to gnd ?0.3 v to in or +6 v (whichever is less) en to gnd ?0.3 v to +30 v adj to gnd ?0.3 v to +6 v storage temperature range ?65c to +150c operating junction temperature range ?40c to +125c soldering conditions jedec j-std-020 stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. thermal resistance ja is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages. table 3. thermal resistance package type ja jc unit 8-lead msop 118 57 c/w esd caution
adp1720 rev. 0 | page 6 of 16 pin configurations and function descriptions gnd gnd gnd gnd gnd in out en 1 2 3 4 8 7 6 5 adp1720 fixed top view (not to scale) 06111-003 gnd gnd gnd gnd adj in out en 1 2 3 4 8 7 6 5 adp1720 adjustable top view (not to scale) 06111-004 figure 3. 8-lead msop figure 4. 8-lead msop table 4. pin function descriptions adp1720 fixed pin no. adp1720 adjustable pin no. mnemonic description 1 gnd this pin is internally connected to ground. 1 adj adjust. a resistor divider from out to adj sets the output voltage. 2 2 in regulator input supply. bypass in to gnd with a 1 f or greater capacitor. 3 3 out regulated output voltage. bypass out to gnd with a 1 f or greater capacitor. 4 4 en enable input. drive en high to turn on the regula tor; drive it low to turn off the regulator. for automatic startup, connect en to in. 5 5 gnd ground. 6 6 gnd ground. 7 7 gnd ground. 8 8 gnd ground.
adp1720 rev. 0 | page 7 of 16 typical performance characteristics v in = 12 v, v out = 5 v, i out = 100 a, c in = c out = 1 f, t a = 25c, unless otherwise noted. 5.03 4.96 ?40 t j (c) v out (v) 5.02 5.01 5.00 4.99 4.98 4.97 ?5 25 85 125 i load = 10a i load = 100a i load = 1ma i load = 10ma i load = 25ma i load = 50ma 06111-005 figure 5. output voltage vs. junction temperature 0.01 100 i load (ma) v out (v) 0.1 1 10 4.9965 4.9970 4.9975 4.9980 4.9985 4.9990 4.9995 5.0000 5.0005 5.0010 5.0015 06111-006 figure 6. output voltage vs. load current 5.010 4.990 03 0 v in (v) v out (v) 5.008 5.006 5.004 5.002 5.000 4.998 4.996 4.994 4.992 5 10152025 i load = 10a i load = 100a i load = 1ma i load = 10ma i load = 25ma i load = 50ma 06111-007 figure 7. output volt age vs. input voltage 1200 0 ?40 t j (c) i gnd (a) 1000 800 600 400 200 ?5 25 85 125 i load = 50ma i load = 25ma i load = 10ma i load = 1ma i load = 100a i load = 10a 06111-008 figure 8. ground current vs. junction temperature 1200 0 0.01 100 i load (ma) i gnd (a) 0.1 1 10 1000 800 600 400 200 06111-009 figure 9. ground current vs. load current 1400 0 03 0 v in (v) i gnd (a) i load = 50ma i load = 25ma i load = 10ma i load = 1ma i load = 100a i load = 10a 1200 1000 800 600 400 200 06111-010 5 10152025 figure 10. ground current vs. input voltage
adp1720 rev. 0 | page 8 of 16 300 0 1 100 i load (ma) v dropout (mv) 10 250 200 150 100 50 06111-011 figure 11. dropout voltage vs. load current 5.05 4.60 4.9 5.4 v in (v) v out (v) 5.00 4.95 4.90 4.85 4.80 4.75 4.70 4.65 5.0 5.1 5.2 5.3 i load = 50ma i load = 25ma i load = 10ma i load = 1ma 06111-012 figure 12. output voltage vs. input voltage (in dropout) 3.5 0 4.9 5.4 v in (v) i gnd (ma) 3.0 2.5 2.0 1.5 1.0 0.5 5.0 5.1 5.2 5.3 i load = 50ma i load = 25ma i load = 10ma i load = 1ma 06111-013 figure 13. ground current vs. input voltage (in dropout) 0 ?100 10 10m frequency (hz) psrr (db) 100 1k 10k 100k 1m ?10 ?20 ?30 ?40 ?50 ?60 ?70 ?80 ?90 100a 10ma 1ma v in = 8v v out = 1.6v c out = 1f v ripple = 50mv 06111-014 figure 14. power supply reje ction ratio vs. frequency (1.6 v adjustable output) 0 ?100 10 10m frequency (hz) psrr (db) 100 1k 10k 100k 1m ?10 ?20 ?30 ?40 ?50 ?60 ?70 ?80 ?90 v in = 8v v out = 5v c out = 1f v ripple = 50mv 100a 10ma 1ma 06111-015 figure 15. power supply reje ction ratio vs. frequency (5.0 v fixed output) time (20s/div) 10mv/di v 1 v in = 12v v out = 1.6v c in = 1f c out = 1f load step from 2.5ma to 47.5ma 06111-016 v out figure 16. load transient response
adp1720 rev. 0 | page 9 of 16 time (100s/div) 10mv/di v 2 2v/di v 1 v out = 5v c in = 1f c out = 1f i load = 50ma 06111-017 v in step from 6v to 7v v out figure 17. line transient response time (40s/div) 2v/di v 2 5v/di v 1 v in = 12v v out = 5v c in = 1f c out = 1f i load = 50ma 06111-018 en v out figure 18. start-up time
adp1720 rev. 0 | page 10 of 16 theory of operation the adp1720 is a low dropout, bicdmos linear regulator that operates from a 4 v to 28 v input rail and provides up to 50 ma of output current. ground current in shutdown mode is typically 700 na. the adp1720 is stable and provides high power supply rejection ratio (psrr) and excellent line and load transient response with just a small 1 f ceramic output capacitor. reference current limit thermal protect shutdown gnd out gnd/adj in en 06111-019 figure 19. internal block diagram internally, the adp1720 consists of a reference, an error ampli- fier, a feedback voltage divider, and a dmos pass transistor. output current is delivered via the dmos pass device, which is controlled by the error amplifier. the error amplifier compares the reference voltage with the feedback voltage from the output and amplifies the difference. if the feedback voltage is lower than the reference voltage, the gate of the dmos device is pulled lower, allowing more current to pass and increasing the output voltage. if the feedback voltage is higher than the reference voltage, the gate of the pnp device is pulled higher, allowing less current to pass and decreasing the output voltage. the adp1720 is available in two versions, one with fixed output voltage options and one with an adjustable output voltage. the fixed output voltage options are set internally to either 5.0 v or 3.3 v, using an internal feedback network. the adjustable output voltage can be set to between 1.225 v and 5.0 v by an external voltage divider connected from out to adj. the adp1720 uses the en pin to enable and disable the out pin under normal operating conditions. when en is high, out turns on; when en is low, out turns off. for automatic startup, en can be tied to in. adjustable output voltage (adp1720 adjustable) the adp1720 adjustable version can have its output voltage set over a 1.225 v to 5.0 v range. the output voltage is set by connecting a resistive voltage divider from out to adj. the output voltage is calculated using the equation v out = 1.225 v (1 + r1 / r2 ) (1) where: r1 is the resistor from out to adj. r2 is the resistor from adj to gnd. to make calculations of r1 and r2 easier, equation 1 can be rearranged as follows: r1 = r2 [( v out /1.225) ? 1] (2) the maximum bias current into adj is 100 na, so for less than 0.5% error due to the bias current, use values less than 60 k for r2.
adp1720 rev. 0 | page 11 of 16 applications information capacitor selection output capacitor the adp1720 is designed for operation with small, space-saving ceramic capacitors, but they function with most commonly used capacitors as long as care is taken about the effective series resistance (esr) value. the esr of the output capacitor affects stability of the ldo control loop. a minimum of 1 f capacitance with an esr of 500 m or less is recommended to ensure stability of the adp1720. transient response to changes in load current is also affected by output capacitance. using a larger value of output capacitance improves the transient response of the adp1720 to large changes in load current. figure 20 and figure 21 show the transient responses for output capacitance values of 1 f and 10 f, respectively. time (2s/div) 10mv/di v 1 v in = 12v v out = 1.6v c in = 1f c out = 1f load step from 2.5ma to 47.5ma 06111-020 figure 20. output transient response time (2s/div) 10mv/di v 1 v in = 12v v out = 1.6v c in = 10f c out = 10f load step from 2.5ma to 47.5ma 06111-021 figure 21. output transient response input bypass capacitor connecting a 1 f capacitor from in to gnd reduces the circuit sensitivity to printed circuit board (pcb) layout, especially when long input traces or high source impedance are encoun- tered. if greater than 1 f of output capacitance is required, it is recommended that the input capacitor be increased to match it. input and output capacitor properties any good quality ceramic capacitors can be used with the adp1720, as long as they meet the minimum capacitance and maximum esr requirements. ceramic capacitors are manufac- tured with a variety of dielectrics, each with different behavior over temperature and applied voltage. capacitors must have a dielectric adequate to ensure the minimum capacitance over the necessary temperature range and dc bias conditions. x5r or x7r dielectrics with a voltage rating of 6.3 v or 10 v are recommended for the output capacitor. x5r or x7r dielectrics with a voltage rating of 50 v or higher are recommended for the input capacitor. y5v and z5u dielectrics are not recommended, due to their poor temperature and dc bias characteristics. current limit and thermal overload protection the adp1720 is protected against damage due to excessive power dissipation by current limit and thermal overload protection circuits. the adp1720 is designed to current limit when the output load reaches 90 ma (typical). when the output load exceeds 90 ma, the output voltage is reduced to maintain a constant current limit. thermal overload protection is included, which limits the junction temperature to a maximum of 150c (typical). under extreme conditions (that is, high ambient temperature and power dissipa- tion), when the junction temperature starts to rise above 150c, the output is turned off, reducing the output current to zero. when the junction temperature drops below 135c, the output is turned on again and output current is restored to its nominal value. consider the case where a hard short from out to gnd occurs. at first the adp1720 current limits, so that only 90 ma is conducted into the short. if self-heating of the junction is great enough to cause its temperature to rise above 150c, thermal shutdown activates, turning off the output and reducing the output current to zero. as the junction temperature cools and drops below 135c, the output turns on and conducts 90 ma into the short, again causing the junction temperature to rise above 150c. this thermal oscillation between 135c and 150c causes a current oscillation between 90 ma and 0 ma, which continues as long as the short remains at the output. current and thermal limit protections are intended to protect the device against accidental overload conditions. for reliable operation, device power dissipation must be externally limited so junction temperatures do not exceed 125c.
adp1720 rev. 0 | page 12 of 16 thermal considerations to guarantee reliable operation, the junction temperature of the adp1720 must not exceed 125c. to ensure the junction temperature stays below this maximum value, the user needs to be aware of the parameters that contribute to junction temperature changes. these parameters include ambient temperature, power dissipation in the power device, and thermal resistances between the junction and ambient air ( ja ). the ja number is dependent on the package assembly compounds used and the amount of copper to which the gnd pins of the package are soldered on the pcb. table 5 shows typical ja values of the 8-lead msop package for various pcb copper sizes. table 5. copper size (mm 2 ) ja (c/w) 0 1 118 50 99 100 77 300 75 500 74 1 device soldered to minimum size pin traces. the junction temperature of the adp1720 can be calculated from the following equation: t j = t a + ( p d ja ) (3) where: t a is the ambient temperature. p d is the power dissipation in the die, given by p d = [( v in ? v out ) i load ] + ( v in i gnd ) (4) where: i load is the load current. i gnd is the ground current. v in and v out are input and output voltages, respectively. power dissipation due to ground current is quite small and can be ignored. therefore, the junction temperature equation simplifies to the following: t j = t a + {[( v in ? v out ) i load ] ja } (5) as shown in equation 5, for a given ambient temperature, input to output voltage differential, and continuous load current, there exists a minimum copper size requirement for the pcb to ensure the junction temperature does not rise above 125c. the following figures show junction temperature calculations for different ambient temperatures, load currents, v in to v out differentials, and areas of pcb copper. 140 0 02 v in ? v out (v) t j (c) 8 120 100 80 60 40 20 1ma 5ma 10ma 20ma 30ma 40ma 50ma (load current) 4 8 12 16 20 24 max t j (do not operate above this point) 06111-022 figure 22. 300 mm 2 of pcb copper, t a = 25c 140 0 02 v in ? v out (v) t j (c) 8 120 100 80 60 40 20 1ma 5ma 10ma 20ma 30ma 40ma 50ma (load current) 4 8 12 16 20 24 max t j (do not operate above this point) 06111-023 figure 23. 100 mm 2 of pcb copper, t a = 25c 140 0 02 v in ? v out (v) t j (c) 8 120 100 80 60 40 20 1ma 5ma 10ma 20ma 30ma 40ma 50ma (load current) 4 8 12 16 20 24 max t j (do not operate above this point) 06111-024 figure 24. 0 mm 2 of pcb copper, t a = 25c
adp1720 rev. 0 | page 13 of 16 140 0 02 8 v in ? v out (v) t j (c) 120 100 80 60 40 20 1ma 5ma 10ma 20ma 30ma 40ma 50ma (load current) 4 8 12 16 20 24 140 0 02 8 v in ? v out (v) t j (c) max t j (do not operate above this point) 06111-025 figure 25. 300 mm 2 of pcb copper, t a = 50c 140 0 02 v in ? v out (v) t j (c) 8 120 100 80 60 40 20 1ma 5ma 10ma 20ma 30ma 40ma 50ma (load current) 4 8 12 16 20 24 max t j (do not operate above this point) 06111-026 figure 26. 100 mm 2 of pcb copper, t a = 50c 120 100 80 60 40 20 1ma 5ma 10ma 20ma 30ma 40ma 50ma (load current) max t j (do not operate above this point) 06111-027 4 8 12 16 20 24 figure 27. 0 mm 2 of pcb copper, t a = 50c
adp1720 rev. 0 | page 14 of 16 printed circuit board layout considerations heat dissipation from the package can be improved by increasing the amount of copper attached to the pins of the adp1720. however, as can be seen from table 5 , a point of diminishing returns eventually is reached, beyond which an increase in the copper size does not yield significant heat dissipation benefits. place the input capacitor as close as possible to the in and gnd pins. place the output capacitor as close as possible to the out and gnd pins. use of 0402 or 0603 size capacitors and resistors achieves the smallest possible footprint solution on boards where area is limited. r1 r2 c2 c1 adp1720 en in out gnd (top) gnd (bottom) 06111-028 figure 28. example pcb layout
adp1720 rev. 0 | page 15 of 16 outline dimensions compliant to jedec standards mo-187-aa 0.80 0.60 0.40 8 0 4 8 1 5 pin 1 0.65 bsc seating plane 0.38 0.22 1.10 max 3.20 3.00 2.80 coplanarity 0.10 0.23 0.08 3.20 3.00 2.80 5.15 4.90 4.65 0.15 0.00 0.95 0.85 0.75 figure 29. 8-lead mini small outline package [msop] (rm-8) dimensions shown in millimeters ordering guide model temperature range output voltage (v) pa ckage description package option branding adp1720armz-5-r7 1 C40c to +125c 5 8-lead msop rm-8 l30 adp1720armz-3.3-r7 1 C40c to +125c 3.3 8-lead msop rm-8 l2z adp1720armz-r7 1 C40c to +125c 1.225 to 5 8-lead msop rm-8 l2m 1 z = rohs compliant part.
adp1720 rev. 0 | page 16 of 16 ?2007 analog devices, inc. all rights reserved. trademarks and registered trademarks are the property of their respective owners. d06111-0-3/07(0) notes

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